1. Field
Aspects of the present disclosure relate to semiconductor devices, and more particularly to silicon germanium (SiGe) use in fin-type field-effect transistors (FinFETs).
2. Background
Silicon germanium (SiGe) has been widely reviewed as a promising material for p-channel metal-oxide-semiconductor (PMOS) devices. SiGe has an intrinsically higher hole mobility than silicon. In standard field effect transistor (FET) geometries, imparting a strain in semiconductor chip regions, such as the source and drain regions of a FET, is common. In fin-type field-effect transistors (FinFETs) structures, however, the volume of the fin available for strain engineering is small. As fin geometries are reduced, such as in ten (10) nanometer device designs, fabrication of SiGe fins becomes expensive and difficult to achieve.